Volume 17, Issue 3 (September 2021)                   IJEEE 2021, 17(3): 1914-1914 | Back to browse issues page


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Morankar G. Low Power True Random Number Generator through Ring Oscillator for IoT and Smart Card Applications. IJEEE 2021; 17 (3) :1914-1914
URL: http://ijeee.iust.ac.ir/article-1-1914-en.html
Abstract:   (2805 Views)
Tremendous developments in integrated circuit technology, wireless communication systems, and personal assistant devices have fuelled growth of Internet of Things (IoT) applications and smart cards. The security of these devices completely depends upon the generation of random and unpredictable digital data streams through random number generator. Low quality, low throughput, and high processing time are observed in software-based pseudo-random number generator due to interrelated data or programs and serial execution of codes respectively. In this paper, FPGA implementation of low power true random number generator through ring oscillator for IoT applications and smart cards is presented. Ring oscillators based on higher jitter and sampling techniques were exploited to present true random number generator. Further statistical parameters of the generated data streams are enhanced through feedback mechanism and post-processing technique. The presented true random number generator technique does not depend on the characteristics of a particular FPGA. The presented technique consumes low power, requires low hardware footprints and passes the entire National Institute of Standards & Technology (NIST) 800-22 statistical test suite. The presented low power and area true random number generator with enhanced security through post-processing unit may be applied for encryption/decryption of data in IoT and smart cards.
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  • FPGA implementation of low power true random number generator through ring oscillator for IoT applications and smart cards is presented.
  • Ring oscillators based on higher jitter and sampling techniques are exploited to present true random number generator.
  • Further statistical parameters of the generated data stream are enhanced through post processing technique.
  • The presented true random number generator technique does not depend on the characteristics of a particular FPGA.
  • The presented technique consumes low power, requires low hardware footprints, and passes the entire NIST statistical test suite.
  • True random number generator with enhanced security through post-processing may be applied for encryption/decryption of data in smart cards and IoT.

Type of Study: Research Paper | Subject: VLSI
Received: 2020/06/27 | Revised: 2020/10/29 | Accepted: 2020/11/06

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Creative Commons License This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License.

Creative Commons License
© 2022 by the authors. Licensee IUST, Tehran, Iran. This is an open access journal distributed under the terms and conditions of the Creative Commons Attribution-NonCommercial 4.0 International (CC BY-NC 4.0) license.