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Showing 6 results for Bandwidth

A. Hajiaboli, Hodjat-Kashani, M. Omidi,
Volume 3, Issue 3 (7-2007)
Abstract

This paper presents a novel implementation of an electromagnetically coupled patch antenna using air gap filled substrates to achieve the maximum bandwidth. We also propose an efficient modeling technique using the FDTD method which can substantially reduce the simulation cost for modeling the structure. The simulated results have been compared with measurement to show the broadband behavior of the antenna and the accuracy of the proposed modeling technique. The measured results show a 16% of VSWR<2 bandwidth which is considerable considering the inherent bandwidth limitations in microstrip antenna technology.
H. Heidarzad Moghaddam, M. Salimi,
Volume 11, Issue 3 (9-2015)
Abstract

Hysteresis current control method is vastly used in PWM inverters because of simplicity in performance, fast control response and good ability in limiting peak current. However, switching frequency in hysteresis current control method with fixed bandwidth has large variation during a cycle and therefore causes non-optimal current ripple generation in output current. One of basic problems in implementing hysteresis current control is its variable switching frequency that causes sound noise and increase in inverter losses and also high frequency current components injection to the source current. In this paper, in addition to the calculation of variable hysteresis bandwidth equation that fixes frequency switching, also other problems can be solved by removing the derivative part. Here, a shunt active filter has been used for removing the current harmonic components generated by non-linear loads. Proposed method is simple to perform and reliable, and also has been simulated in MATHLAB software environment

AWT IMAGE


S. J. Azhari, M. Zareie,
Volume 15, Issue 2 (6-2019)
Abstract

In this paper, a novel low voltage low power current buffer was presented. The proposed structure was implemented in CMOS technology and is the second generation of OCB (orderly current buffer) called OCBII. This generation is arranged in single input-single output configuration and has modular structure. It is theoretically analyzed and the formulae of its most important parameters are derived. Pre and Post-layout plus Monte Carlo simulations were performed under ±0.75 V by Cadence using TSMC 0.18 µm CMOS technology parameters up to 3rd order. The proposed structure could expand and act as a dual output buffer in which the second output shows extremely high impedance because of its cascode configuration. The results prove that OCBII makes it possible to achieve very low values of input impedance under low supply voltages and low power dissipation. The most important parameters of 1st, 2nd and 3rd orders, i.e. input impedance (Rin), -3 dB bandwidth (BW), power dissipation (Pd) and output impedance (Ro) were found respectively in Pre-layout plus Monte Carlo results as:
1st order: Rin (52.4 Ω), BW (733.7 MHz), Pd (225.6 µW), Ro (105.6 kΩ)
2nd order: Rin (3.8 Ω), BW (576.4 MHz), Pd (307 µW), Ro (106.4 kΩ)
3rd order: Rin (0.34 Ω), BW (566.9 MHz), Pd (535.6 µW), Ro (118.2 kΩ)
And in Post-layout plus Monte Carlo results as:
1st order: Rin (59.9 Ω), BW (609.6 MHz), Pd (212.4 µW), Ro (106.9 kΩ)
2nd order: Rin (11.3 Ω), BW (529.3 MHz), Pd (389.9 µW), Ro (109.8 kΩ)
3rd order: Rin (5.8 Ω), BW (526.5 MHz), Pd (514.5 µW), Ro (125.5 kΩ)
Corner cases simulation results are also provided indicating well PVT insensitivity advantage of the block.

M. A. Trimukhe, B. G. Hogade,
Volume 15, Issue 2 (6-2019)
Abstract

In this paper a particle swarm optimization (PSO) algorithm is presented to design a compact stepped triangle shape antenna in order to obtain the proper UWB bandwidth as defined by FCC. By changing the various cavity dimensions of the antenna, data to develop PSO program in MATLAB is achieved. The results obtained from the PSO algorithm are applied to the antenna design to fine-tune the bandwidth. Bandwidth optimization for ultra-wideband frequency of 3.1 GHz to 10.6 GHz is achieved by applying PSO algorithm. High-Frequency Structure Simulator (HFSS) software tool is used for the simulation. An optimized antenna is fabricated, tested and test results are found in accordance with simulation results.

T. Azadmousavi, H. Faraji Baghtash, E. Najafi Aghdam,
Volume 15, Issue 2 (6-2019)
Abstract

A power efficient gain adjustment technique is described to realize programmable gain current mirror. The dissipation power changes over the wide gain range of structure are almost negligible. This property is in fact very interesting from power management perspective, especially in analog designs. The simple structure and constant frequency bandwidth are other ever-interesting merits of proposed structure. The programming gain range of structure is from zero up to 18dB under operating frequency range from 72 kHz to 173 MHz. The maximum power dissipation of designed circuit is only 3.1 µW which is drawn from 0.7 V supply voltage. Simulation results in 0.18 µm CMOS TSMC standard technology demonstrate the high performance of the proposed structure.

N. Raj,
Volume 17, Issue 3 (9-2021)
Abstract

The performance of any system is decided by the circuit configurations used in its implementation. Current mirror is one of those circuit configurations which are widely used in analog system designs. The performance of current mirror is decided by its parameters which include large operating range, wide bandwidth along with very low input and very high output resistances. In this paper, a low voltage flipped voltage follower based current mirror is presented. The structure flipped voltage follower is initially modified using a feedback path which results in the low impedance node which when considered as input in the proposed current mirror results in an extremely low value of input resistance. Compared to conventional flipped voltage follower based current mirror design the proposed design works well with minimum error in microamperes range with extended bandwidth without affecting its output resistance. The input resistance gets scaled down to 17 ohms from 840 ohms whereas bandwidth gets almost doubled approximately to 4.5GHz from 2.4GHz. The power dissipation ranges in microwatts. The simulations are supported with mathematical analysis. The complete analysis is done in HSpice using MOS models of 0.18-micron technology at a dual supply voltage, ±0.5V.


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