Search published articles



A. Rana, N. Chand, V. Kapoor,
Volume 7, Issue 2 (6-2011)
Abstract

In this paper, novel hybrid MOSFET(HMOS) structure has been proposed to reduce the gate leakage current drastically. This novel hybrid MOSFET (HMOS) uses source/drain-to-gate non-overlap region in combination with high-K layer/interfacial oxide as gate stack. The extended S/D in the non-overlap region is induced by fringing gate electric field through the high-k dielectric spacer. The gate leakage behaviour of HMOS has been investigated with the help of compact analytical model and Sentaurus Simulation. The results so obtained show good agreement between model and simulation data. It is found that HMOS structure has reduced the gate leakage current to great extent as compared to conventional overlapped MOSFET structure. Further, the proposed structure had demonstrated improved on current, off current, subthreshold slope and DIBL characteristic.
A. Bijari, S. H. Keshmiri , W. Wanburee,
Volume 8, Issue 1 (3-2012)
Abstract

This paper presents a nonlinear analytical model for micromechanical silicon ring resonators with bulk-mode vibrations. A distributed element model has been developed to describe the dynamic behavior of the micromechanical ring resonator. This model shows the nonlinear effects in a silicon ring resonator focusing on the effect of large amplitudes around the resonance frequency, material and electrical nonlinearities. Through the combination of geometrical and material nonlinearities, closed-form expressions for third-order nonlinearity in mechanical stiffness of bulk-mode ring resonators are obtained. Using the perturbation method and the method of harmonic balance, the expressions for describing the effect of nonlinearities on the resonance frequency and stability are derived. The results, which show the effect of varying the AC drive voltage, initial gap, DC applied voltage and the quality factor on the frequency response and resonant frequencies, are discussed in detail. The nonlinear model introduces an appropriate method in the field of bulk-mode ring resonator design for achieving sufficient power handling and low motional resistance.
A. Bijari, S. H. Keshmiri, W. Wanburee, Ch. Sriphung, R. Phatthanakun,
Volume 8, Issue 4 (12-2012)
Abstract

This paper presents the design and a new low-cost process for fabrication of a second-order micromechanical filter using UV-LIGA technology. The micromechanical filter consists of two identical bulk-mode ring resonators, mechanically coupled by a flexural-mode beam. A new lumped modeling approach is presented for the bulk-mode ring resonators and filter. The validity of the analytical derivation is investigated using the finite element method by ANSYS software. The new low-cost fabrication process is used to achieve a high aspect ratio of 16 with 3 μm gap spacing. The rigid graphite serves as a low-cost primary substrate and plating base of nickel as structural material. The fabrication process needs only three UV-lithography steps with Mylar masks to fabricate the main structure and pattern the printed circuit board as a secondary substrate. The frequency response of the fabricated filter is characterized as a function of the DC-bias voltage using a fully differential drive and sense interface circuit. The experimental results demonstrates micromechanical filter with center frequency in the vicinity of 10.31 MHz and percent bandwidth less than 0.3% using a DC-bias voltage of 60 V. The detailed fabrication process can be applied as an appropriate low-cost alternative to X-ray LIGA and silicon-based micromechanical filters.
A. Daghighi,
Volume 9, Issue 3 (9-2013)
Abstract

In this article, a novel concept is introduced to improve the radio frequency (RF) linearity of partially-depleted (PD) silicon-on-insulator (SOI) MOSFET circuits. The transition due to the non-zero body resistance (RBody) in output conductance of PD SOI devices leads to linearity degradation. A relation for RBody is defined to eliminate the transition and a method to obtain transition-free circuit is shown. 3-D Simulations of various body-contacted devices are carried out to extract the transition-free body resistances. To identify the output conductance transition-free concept and its application to RF circuits, a 2.4 GHz low noise amplifier (LNA) is analyzed. Mixed mode device-circuit analysis is carried out to simultaneously solve device transport equations and circuit spice models. FFT calculations are performed on the output signal to compute harmonic distortion figures. Comparing the conventional body-contacted and transition-free SOI LNAs, third harmonic distortion (HD3) and total harmonic distortion (THD) are improved by 16% and 24%, respectively. Two-tone test is used to analyze third order intermodulation distortions. OIP3 is improved in transition-free SOI LNA by 17% comparing with the conventional body-contacted SOI LNA. These results show the possibility of application of transition-free design concept to improve linearity of RF SOI MOSFET circuits.
M. Akbari Eshkalak,
Volume 12, Issue 2 (6-2016)
Abstract

This paper is the first study on the impact of ambient temperature on the electrical characteristics and high frequency performances of double gate armchair graphene nanoribbon field effect transistor (GNRFET). The results illustrate that the GNRFET under high temperature (HT-GNRFET) has the highest cut-off frequency, lowest sub-threshold swing, lowest intrinsic delay and power delay product compared with low-temperature GNRFET (LT-GNRFET) and medium-temperature GNRFET (MTGNRFET). Besides, the LT-GNRFET demonstrates the lowest off-state current and the highest ratios of Ion/Ioff, average velocity and mobile charge. In addition, the LT-GNRFET has the highest gate and quantum capacitances among three aforementioned GNRFETs.


A. Acharyya,
Volume 14, Issue 2 (6-2018)
Abstract

The potentiality of millimter-wave (mm-wave) double-drift region (DDR) impact avalanche transit time (IMPATT) diodes based on a wide bandgap (WBG) semiconductor material, Gallium Phosphide (GaP) has been explored in this paper. A non-sinusoidal voltage excited (NSVE) large-signal simulation method has been used to study the DC and high frequency characteristics of DDR GaP IMPATTs dsigned to operate at mm-wave atmospheric window frequencies such as 94, 140 and 220 GHz. Results show that the DDR GaP IMPATTs are capable of delivering significantly higher RF power at the above mentioned window frequencies as compared to the DDR IMPATTs based on the conventional narrow bandgap (NBG) base materials such as Si, GaAs and InP.

S. M. Ahmed, K. S. Ahmed, Y. M. Shuaib,
Volume 19, Issue 1 (3-2023)
Abstract

This article discusses the operating principle and simulation of closed loop control of a three phase induction motor (IM) powered by five level diode clamped multilevel inverter (DCMLI) using direct torque control (DTC) technique. The main purpose of this article is to regulate the torque and speed of an IM and to decrease total harmonic distortion (THD). In this article, a five-level inverter's direct modulation approach with the dc link voltage self-balancing is presented. To reduce capacitor voltage variation, the redundancies of various switch topologies for the creation of intermediate voltages are also used. The use of LC filter results in lower output voltage and current distortion. A multicarrier PWM control technique is used for DCMLI to provide high quality sinusoidal output voltage with decreased harmonics. This can be obtained by employing Sinusoidal Pulse Width Modulation (SPWM) method for speed and torque control. This demonstrates that the recommended method of controlling the motor's speed and torque is effective. The simulation result reveals that DTC for the five-level inverter fed IM drive gives a rapid dynamic response, lower voltage and current THDs, and much less flux and torque distortion. The simulation is carried out in MATLAB Simulink (R2014).

Zahra Ahangari,
Volume 20, Issue 2 (6-2024)
Abstract

In this paper, an innovative vertical bi-channel tunnel field effect transistor is presented that exploits line tunneling mechanism to achieve improved electrical performance. In this device, the source contains germanium, while the channel and drain regions consist of GaAs., which results in a type-II heterostructure with low resistance tunneling barrier. The source region is situated in a vertical position, enclosed by two sidewall channels that encompass a broad area of tunneling. Our proposed design effectively blocks the electric field that is originated from the drain at the tunneling junction, thereby conferring high immunity to drain induced barrier thinning effect. The device that has been suggested offers a significantly greater on-state current, a factor of 144, when compared to the traditional TFET and provides a subthreshold swing of 3mV/dec and an on/off current ratio of 9.76×1010. According to statistical analysis, the design parameters of metal gate workfunction value and source doping concentration are crucial and have the potential to impact device performance. Therefore, selecting the appropriate combination of these parameters is essential. The proposed device serves as a foundation for the development of computing systems that are low in power and high in speed.

Page 1 from 1     

Creative Commons License
© 2022 by the authors. Licensee IUST, Tehran, Iran. This is an open access journal distributed under the terms and conditions of the Creative Commons Attribution-NonCommercial 4.0 International (CC BY-NC 4.0) license.