H. Fallah Khoshkar, A. Doroudi, M. Mohebbi,
Volume 10, Issue 4 (12-2014)
Abstract
This paper studies the effects of symmetrical voltage sags on the operational characteristics of a Permanent Magnet Synchronous Motor (PMSM) by Finite Element Method (FEM). Voltage sags may cause high torque pulsations which can damage the shaft or equipment connected to the motor. By recognizing the critical voltage sags, sags that produce hazardous torque variations could be prevented. Simulations results will be provided and the critical voltage sags are recognized. A simple theoretical analysis will also be presented to obtain a qualitative understanding of the phenomena occurring in PMSM during symmetrical voltage sags
E. Babaei, M. R. Farzinnia,
Volume 12, Issue 1 (3-2016)
Abstract
In this paper, a new topology for Interline Dynamic Voltage Restorer (IDVR) is proposed. This topology contains two direct three-phase converters which have been connected together by a common fictitious dc-link. According to the kind of the disturbances, both of the converters can be employed as a rectifier or inverter. The converters receive the required compensation energy from the gird through the direct link which is provided by the dual-proposed switches. Due to the lack of the huge storage elements, the practical prototype of the proposed topology is more economical in comparison with the traditional structure. Moreover, compensating for long time duration is possible due to the unlimited eternal energy which is provided from the grids. The low volume, cost and weight are the additional features of the proposed topology in comparison with traditional types. This topology is capable to compensate both of the balanced and unbalanced disturbances. Furthermore, restoring the deep sags and power outages will be possible with the support from the other grid. Unlike the conventional topologies, the capability of compensation is independent from the power flow and the power factor of each grid. The performance of the proposed IDVR topology is validated by computer simulation with PSCAD/EMTDC software.
S. R. Sadu, P. V. Prasad, G. N. Srinivas,
Volume 14, Issue 1 (3-2018)
Abstract
This paper presents the comparative study of three phase twenty five level diode clamped and cascaded H-bridge multilevel inverters. The comparison is made in respect of requirement of devices, quality of output voltage and reduction of total harmonic distortion at the multilevel inverter terminals. In this work multicarrier sinusoidal pulse modulation control methods of Phase disposition (PD-PWM), phase opposition disposition (POD-PWM) and Alternative Phase Opposition Disposition (APOD-PWM) pulse width modulation control strategies are applied for both diode clamped and cascaded H-bridge multilevel inverters and compared its total harmonic distortion. The performance of both diode and cascaded H-bridge multilevel inverters is investigated and compared. Based on simulation results it is observed that the output voltage of the cascaded H-bridge multilevel inverters is better as compared to the diode clamped multilevel inverter. The proposed multilevel inverters are simulated using MATLAB/Simulink software.
M. K. Saini, R. K. Beniwal,
Volume 14, Issue 2 (6-2018)
Abstract
This paper presents a new framework based on modified EMD method for detection of single and multiple PQ issues. In modified EMD, DWT precedes traditional EMD process. This scheme makes EMD better by eliminating the mode mixing problem. This is a two step algorithm; in the first step, input PQ signal is decomposed in low and high frequency components using DWT. In the second stage, the low frequency component is further processed with EMD technique to get IMFs. Eight features are extracted from IMFs of low frequency component. Unlike low frequency component, features are directly extracted from the high frequency component. All these features form feature vector which is fed to PNN classifier for classification of PQ issues. For comparative analysis of performance of PNN, results are compared with SVM classifier. Moreover, performance of proposed methodology is also validated with noisy PQ signals. PNN has outperformed SVM for both noiseless and noisy PQ signals.
A. S. Hoshyarzadeh, B. Zaker, A. A. Khodadoost Arani, G. B. Gharehpetian,
Volume 14, Issue 3 (9-2018)
Abstract
Recently, smart grids have been considered as one of the vital elements in upgrading current power systems to a system with more reliability and efficiency. Distributed generation is necessary for most of these new networks. Indeed, in all cases that DGs are used in distribution systems, protection coordination failures may occur in multiple configurations of smart grids using DGs. In different configurations, there are various fault currents that can lead to protection failure. In this study, an optimal DG locating and Thyristor-Controlled Impedance (TCI) sizing of resistive, inductive, and capacitive type is proposed for distribution systems to prevent considerable changes in fault currents due to different modes of the smart grid. This problem is nonlinear constrained programming (NLP) and the genetic algorithm is utilized for the optimization. This optimization is applied to the IEEE 33-bus and IEEE 69-bus standard distribution systems. Optimum DG location and TCI sizing has carried out in steady fault currents in the grid-connected mode of these practical networks. Simulation results verify that the proposed method is effective for minimizing the protection coordination failure in such distribution networks.
R. Shariatinasab, M. Rasuli, J. Gholinezhad,
Volume 15, Issue 1 (3-2019)
Abstract
In this paper a novel method based on evolutionary algorithms is presented to estimate the harmonic components. In general, the optimization of the harmonic estimation process is a multi-component problem, in which evaluation of the phase and harmonic frequency is the nonlinear part of the problem and is solved based on the mathematical and evolutionary methods; while estimation of amplitude of the harmonic component is a linear issue that is performed by combining the least squares method with the aforementioned approaches. In this paper, firstly, the optimal estimation of integer harmonic components has been introduced based on the improved shuffled frog leaping algorithm (ISFLA) in the presence of two types of noise. The obtained results present the lower error of the proposed method than to IGHS, FBF PSO, GA and FFT methods. Thereafter, the effectiveness of the presented algorithm in optimal estimation of frequency, phase, and amplitude of the integer and non-integer harmonics are investigated. The optimization of the estimation of various harmonic components under different conditions using ISFLA leads to an improvement in the assessment of power quality in power systems especially in the distribution networks, considering a lot of the nonlinear loads and harmonic resources connected to the network.
B. Tousi, M. Farhadi-Kangarlu, M. Farzinnia,
Volume 15, Issue 3 (9-2019)
Abstract
In this paper a new topology for Dynamic Voltage Restorer (DVR) with high frequency link is proposed. This topology is able to compensate different types of voltage disturbances such as voltage sag, voltage swell and voltage harmonics. According to the obtained equations, this topology operates as a controllable current source to charge the series capacitor. Due to using High Frequency Transformer (HFT), the volume and the weight of the proposed DVR is decreased in comparison with conventional DVRs. This topology contains two ac/ac converters which are using in the input and output of the device. The absence of DC link capacitors and storage elements is the other advantage of using the proposed structure. In order to verify the claimed features, the proposed topology has been simulated by PSCAD/EMTDC software and examined under several disturbance conditions. In addition, an experimental prototype has been designed and tested. The results of the simulation and experimental cases are presented.
A. Kumar, P. Kumar,
Volume 15, Issue 4 (12-2019)
Abstract
This paper presents the three topologies of three-phase four-wire DSTATCOM for reduction of harmonics, reactive power compensation, increasing power factor, which occur due to a nonlinear load, environment problem and polluted grid. The performances of the above topologies have been compared for the magnitude of source current, power factor improvement, DC-link voltage regulation, and total harmonic distortion. This paper presents a novel work for the new young scientist /industrialist who working in the improvement of power quality in the grid. This paper helps to provide the application, designing constraints of shunt active filter in many fields. The First topology which is used in this paper is the three-phase four-wire four-pole voltage source converter based DSTATCOM. The second is the three-phase four-wire with three-leg voltage source converter based DSTATCOM with T-connected transformer and the third topology is the three H-bridge voltage source converter based DSTATCOM. The T-connected transformer in the second topology has been used to reduce the rating for voltage source converter. Synchronous reference frame theory based controller has been proposed to the generation of the reference current. Reference current generated from the synchronous frame theory is processed to hysteresis current controller loop which produces switching pulses for VSC based DSTATCOM. All these topologies have been implemented in MATLAB /Simulink platform by using different types of loading conditions such as resistive and power electronics load.
Huang Yan, Hadi Nabipour Afrouzi, Chin-Leong Wooi , Hieng Tiong Su, Ismat Hijazin,
Volume 21, Issue 2 (6-2025)
Abstract
In order to solve the difficulty of digital signal calibration of electric power equipment, such as low precision, inability to test the full range, and complicated configuration, and further promote the development of power system, a proposed time measurement calibration device is designed, and its performance is verified in this paper. This paper points out the main drawbacks of the existing calibration system, carries on the design innovation of the key technologies based on FPGA (Field Programmable Gate Array), puts forward the optimization method of the software and hardware, and verifies the accuracy of the input and output signal by experiments. The accuracy of input and output SV, GOOSE, and contact signal of the proposed calibration device in this paper can be better than 10μs, which is a meaningful improvement in accuracy and efficiency for time measurement calibration.
