
Iran University of Science and Technology
Electrical Engineering Department
| Master of Science Thesis Defense Session | 269 |

Design of Disturbance Rejection 2-DOF Fractional-Oder PID Controllers for Time Delay Systems |
Abstract Fractional-order PID controllers in which the order of integrating and derivative operators are of non-integer order, have widely attracted attention in recent years. Since there are two extra parameters in these controllers, they can be adjusted more precisely to achieve the desired performance. However, finding these parameters is a more complicated task. In addition stability analysis of fractional systems differs from existing methods for stability analysis of integer order systems. In this project fractional PID controllers in a 2-Degree-Of-Freedom structure have been applied to time delay systems. Owing to the dead time in time delay systems, they need a compensator which can remove undesirable effects of the dead time so that an appropriate response can be achieved. The purpose is to obtain the desired response in presence of disturbance. In order to obtain the optimal parameters of the controller particle swarm optimization technique and genetic algorithm have been used. By assuming interval uncertainty for the parameters of the plant, robust stability of the system with the optimal controller designed by particle swarm optimization and genetic algorithm, has been analyzed. This controller cannot be applied to the systems with long time delays. To solve this problem a filter with a gain higher than the gain of the plant is added to the system. By adding this dominant gain filter, non-minimum-phase effects of the dead time are removed. Selecting a fractional order filter rather than an integer order one, phase shift effect which may appear in phase behavior of the system by using integer order filters is reduced. This compensator also has an acceptable performance in disturbance rejection. |
Student: Khosro Khandani Supervisor: Dr. Ali Akbar Jalali Advisor: Dr. Mohammad Reza Jahed Motlagh Examiners: Dr. Hooman Sajjadian; Dr. Mohammad Saleh Tavazoei |
Date: 21 July, 2010 Time: 10 A.M. Location: Seminar Hall of Electrical Engineering Department |