<?xml version="1.0" encoding="utf-8"?>
<journal>
<title>IRANIAN JOURNAL OF ELECTRICAL AND ELECTRONIC ENGINEERING</title>
<title_fa></title_fa>
<short_title>IJEEE</short_title>
<subject>Engineering &amp; Technology</subject>
<web_url>http://ijeee.iust.ac.ir</web_url>
<journal_hbi_system_id>18</journal_hbi_system_id>
<journal_hbi_system_user>agent2</journal_hbi_system_user>
<journal_id_issn>1735-2827</journal_id_issn>
<journal_id_issn_online>1735-2827</journal_id_issn_online>
<journal_id_pii></journal_id_pii>
<journal_id_doi></journal_id_doi>
<journal_id_iranmedex></journal_id_iranmedex>
<journal_id_magiran></journal_id_magiran>
<journal_id_sid></journal_id_sid>
<journal_id_nlai></journal_id_nlai>
<journal_id_science></journal_id_science>
<language>en</language>
<pubdate>
	<type>jalali</type>
	<year>1402</year>
	<month>12</month>
	<day>1</day>
</pubdate>
<pubdate>
	<type>gregorian</type>
	<year>2024</year>
	<month>3</month>
	<day>1</day>
</pubdate>
<volume>20</volume>
<number>1</number>
<publish_type>online</publish_type>
<publish_edition>1</publish_edition>
<article_type>fulltext</article_type>
<articleset>
	<article>


	<language>en</language>
	<article_id_doi></article_id_doi>
	<title_fa></title_fa>
	<title>Proposing Very Low Power Three-Valued Flip-Flops by Using CNTFET Transistors</title>
	<subject_fa>2-VLSI</subject_fa>
	<subject>VLSI</subject>
	<content_type_fa>Research Paper </content_type_fa>
	<content_type>Research Paper </content_type>
	<abstract_fa></abstract_fa>
	<abstract>&lt;a name=&quot;_Hlk161092592&quot;&gt;&lt;span style=&quot;color:#000000;&quot;&gt;&lt;span style=&quot;font-size:10.0pt&quot;&gt;&lt;span new=&quot;&quot; roman=&quot;&quot; style=&quot;font-family:&quot; times=&quot;&quot;&gt;The scaling limitations of Complementary Metal-Oxide-Semiconductor (CMOS) transistors to achieve better performance have led to the attention of other structures to improve circuit performance. One of these structures is multi-valued circuits. In this paper, we will first study Carbon Nanotube Transistors (CNT). &lt;/span&gt;&lt;/span&gt;&lt;span class=&quot;fontstyle01&quot; style=&quot;font-family:TimesNewRomanPSMT,serif&quot;&gt;&lt;span style=&quot;font-weight:normal&quot;&gt;&lt;span style=&quot;font-style:normal&quot;&gt;&lt;span style=&quot;font-size:10.0pt&quot;&gt;CNT transistors offer a viable means to implement multi-valued logic due to their variable and controllable threshold voltage. Subsequently, we delve into the realm of three-valued flip-flop circuits, which find extensive utility in digital electronics. Leveraging the insights gained from our analysis, we propose a novel D-type flip-flop structure. The presented structure boasts a remarkably low power consumption, showcasing a reduction exceeding 61% compared to other existing structures. Furthermore, the proposed circuit incorporates a reduced number of transistors, resulting in a reduced footprint. Importantly, this circuit exhibits negligible static power consumption in generating intermediate values, rendering it robust against&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;span class=&quot;fontstyle01&quot; style=&quot;font-family:TimesNewRomanPSMT,serif&quot;&gt;&lt;span style=&quot;font-weight:normal&quot;&gt;&lt;span style=&quot;font-style:normal&quot;&gt; &lt;span style=&quot;font-size:10.0pt&quot;&gt;process variations.&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&amp;nbsp; &lt;/span&gt;&lt;/a&gt;&lt;span style=&quot;color:#000000;&quot;&gt;&lt;span style=&quot;font-size:10.0pt&quot;&gt;&lt;span new=&quot;&quot; roman=&quot;&quot; style=&quot;font-family:&quot; times=&quot;&quot;&gt;Overall, the proposed circuits demonstrate a 29.7% increase in delay compared to the compared structures. However, they showcase a 96.1% reduction in power-delay product (PDP) compared to the other structures. The number of transistors is also 8.3% less than other structures. Additionally, their figure of merits (FOM) are 19.7% better than the best-compared circuit, underscoring its advantages in power efficiency, chip area, and performance.&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;</abstract>
	<keyword_fa></keyword_fa>
	<keyword>CNTFET, Flip-Flop, High Performance, Low Power, Multi-Valued</keyword>
	<start_page>83</start_page>
	<end_page>93</end_page>
	<web_url>http://ijeee.iust.ac.ir/browse.php?a_code=A-10-4864-1&amp;slc_lang=en&amp;sid=1</web_url>


<author_list>
	<author>
	<first_name>Amirhossein</first_name>
	<middle_name></middle_name>
	<last_name>Salimi</last_name>
	<suffix></suffix>
	<first_name_fa></first_name_fa>
	<middle_name_fa></middle_name_fa>
	<last_name_fa></last_name_fa>
	<suffix_fa></suffix_fa>
	<email>salimiamir36@yahoo.com</email>
	<code>1800319475328460014033</code>
	<orcid>1800319475328460014033</orcid>
	<coreauthor>No</coreauthor>
	<affiliation>Department of Electrical and Computer Engineering, Science and Research Branch, Islamic Azad University, Tehran, Iran</affiliation>
	<affiliation_fa></affiliation_fa>
	 </author>


	<author>
	<first_name>Behzad</first_name>
	<middle_name></middle_name>
	<last_name>Ebrahimi</last_name>
	<suffix></suffix>
	<first_name_fa></first_name_fa>
	<middle_name_fa></middle_name_fa>
	<last_name_fa></last_name_fa>
	<suffix_fa></suffix_fa>
	<email>behzad.ebrahimi@srbiau.ac.ir</email>
	<code>1800319475328460014034</code>
	<orcid>000000021754435X</orcid>
	<coreauthor>Yes
</coreauthor>
	<affiliation>Department of Electrical and Computer Engineering, Science and Research Branch, Islamic Azad University, Tehran, Iran</affiliation>
	<affiliation_fa></affiliation_fa>
	 </author>


	<author>
	<first_name>Massoud</first_name>
	<middle_name></middle_name>
	<last_name>Dousti</last_name>
	<suffix></suffix>
	<first_name_fa></first_name_fa>
	<middle_name_fa></middle_name_fa>
	<last_name_fa></last_name_fa>
	<suffix_fa></suffix_fa>
	<email>m_dousti@srbiau.ac.ir</email>
	<code>1800319475328460014035</code>
	<orcid>1800319475328460014035</orcid>
	<coreauthor>No</coreauthor>
	<affiliation>Department of Electrical and Computer Engineering, Science and Research Branch, Islamic Azad University, Tehran, Iran</affiliation>
	<affiliation_fa></affiliation_fa>
	 </author>


</author_list>


	</article>
</articleset>
</journal>
