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Showing 3 results for Salimi

H. Heidarzad Moghaddam, M. Salimi,
Volume 11, Issue 3 (September 2015)

Hysteresis current control method is vastly used in PWM inverters because of simplicity in performance, fast control response and good ability in limiting peak current. However, switching frequency in hysteresis current control method with fixed bandwidth has large variation during a cycle and therefore causes non-optimal current ripple generation in output current. One of basic problems in implementing hysteresis current control is its variable switching frequency that causes sound noise and increase in inverter losses and also high frequency current components injection to the source current. In this paper, in addition to the calculation of variable hysteresis bandwidth equation that fixes frequency switching, also other problems can be solved by removing the derivative part. Here, a shunt active filter has been used for removing the current harmonic components generated by non-linear loads. Proposed method is simple to perform and reliable, and also has been simulated in MATHLAB software environment


A. Zakipour, K. Aminzare, M. Salimi,
Volume 18, Issue 3 (September 2022)

Considering the presence of different model parameters and controlling variables, as well as the nonlinear nature of DC to AC inverters; stabilizing the closed-loop system for grid current balancing is a challenging task. To cope with these issues, a novel sliding mode controller is proposed for the current balancing of local loads using grid-connected inverters in this paper. The closed-loop system includes two different controlling loops: a current controller which regulates the output current of grid-connected inverter and a voltage controller which is responsible for DC link voltage regulation. The main features of the proposed nonlinear controller are reactive power compensation, harmonic filtering and three-phase balancing of local nonlinear loads.  The developed controller is designed based on the state-space averaged modelling its stability and robustness are proved analytically using the Lyapunov stability theorem. The accuracy and effectiveness of proposed controlled approach are investigated through the PC-based simulations in MATLAB/Simulink.

Amirhossein Salimi, Behzad Ebrahimi, Massoud Dousti,
Volume 20, Issue 1 (March 2024)

The scaling limitations of Complementary Metal-Oxide-Semiconductor (CMOS) transistors to achieve better performance have led to the attention of other structures to improve circuit performance. One of these structures is multi-valued circuits. In this paper, we will first study Carbon Nanotube Transistors (CNT). CNT transistors offer a viable means to implement multi-valued logic due to their variable and controllable threshold voltage. Subsequently, we delve into the realm of three-valued flip-flop circuits, which find extensive utility in digital electronics. Leveraging the insights gained from our analysis, we propose a novel D-type flip-flop structure. The presented structure boasts a remarkably low power consumption, showcasing a reduction exceeding 61% compared to other existing structures. Furthermore, the proposed circuit incorporates a reduced number of transistors, resulting in a reduced footprint. Importantly, this circuit exhibits negligible static power consumption in generating intermediate values, rendering it robust against process variations.  Overall, the proposed circuits demonstrate a 29.7% increase in delay compared to the compared structures. However, they showcase a 96.1% reduction in power-delay product (PDP) compared to the other structures. The number of transistors is also 8.3% less than other structures. Additionally, their figure of merits (FOM) are 19.7% better than the best-compared circuit, underscoring its advantages in power efficiency, chip area, and performance.

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© 2022 by the authors. Licensee IUST, Tehran, Iran. This is an open access journal distributed under the terms and conditions of the Creative Commons Attribution-NonCommercial 4.0 International (CC BY-NC 4.0) license.