Showing 5 results for Ebrahimi
M. R. Feyzi, Y. Ebrahimi,
Volume 5, Issue 3 (September 2009)
Abstract
A switched Reluctance motor (SRM) has several desirable features, including
simple construction, high reliability and low cost. However, it suffers from large torque
ripple, highly non-uniform torque output and magnetization characteristics and large noise.
Several studies have succeeded in torque ripple reduction for SRM using Direct Torque
Control (DTC) technique. DTC method has many advantages over conventional voltage
control and current chopping mode control such as simple algorithm, less torque ripple and
instantaneous response to the torque command. In this paper, DTC method is proposed for
a 5-phase 10/8 SRM. The performance of the motor is demonstrated through the computer
simulation in Mtalab/Simulink. Then, the obtained results are verified by comparison with
the corresponding results of a 3-phase 6/4 motor performance.
M. Fathipour, M. H. Refan, S. M. Ebrahimi,
Volume 6, Issue 2 (June 2010)
Abstract
High Q frequency reference devices are essential components in many Integrated
circuits. This paper will focus on the Resonant Suspended Gate (RSG) MOSFET. The gate
in this structure has been designed to resonate at 38.4MHz. The MOSFET in this device
has a retrograde channel to achieve high output current. For this purpose, abrupt retrograde
channel and Gaussian retrograde channels have been investigated.
S. R. Mousavi-Aghdam, M. R. Feyzi, Y. Ebrahimi,
Volume 8, Issue 1 (March 2012)
Abstract
This paper presents a new design to reduce torque ripple in Switched Reluctance Motors (SRM). Although SRM possesses many advantages in terms of motor structure, it suffers from large torque ripple that causes problems such as vibration and acoustic noise. The paper describes new rotor and stator pole shapes with a non-uniform air gap profile to reduce torque ripple while retaining its average value. An optimization using fuzzy strategy is successfully performed after sensitivity analysis. The two dimensional (2-D) finite element method (FEM) results, have demonstrated validity of the proposed new design.
Mr Y Ebrahimi, Prof M.r Feyzi,
Volume 11, Issue 4 (December 2015)
Abstract
A novel structure of switched reluctance motors (SRMs) is proposed. The proposed structure uses the benefits of the axial flux path, short flux path, segmental rotor, and flux reversal free stator motors all together to improve the torque density of the SRMs. The main geometrical, electrical and physical specifications are presented. In addition, some features of the proposed structure are compared with those of a state-of-the-art radial flux SRM, considered as a reference motor. Then, the proposed structure is modified by employing a higher number of rotor segments than the stator modules and at the same time, reshaped stator modules tips. Achieved results reveal that, compared with the reference motor, the proposed and the modified proposed motors deliver about the same torque with 36.5% and 46.7% lower active material mass, respectively. The efficiency and torque production capability for the extended current densities are also retained. These make the proposed structures a potentially proper candidate for the electric vehicles (EVs) and hybrid electric vehicles (HEVs) as an in-wheel motor.
Amirhossein Salimi, Behzad Ebrahimi, Massoud Dousti,
Volume 20, Issue 1 (March 2024)
Abstract
The scaling limitations of Complementary Metal-Oxide-Semiconductor (CMOS) transistors to achieve better performance have led to the attention of other structures to improve circuit performance. One of these structures is multi-valued circuits. In this paper, we will first study Carbon Nanotube Transistors (CNT). CNT transistors offer a viable means to implement multi-valued logic due to their variable and controllable threshold voltage. Subsequently, we delve into the realm of three-valued flip-flop circuits, which find extensive utility in digital electronics. Leveraging the insights gained from our analysis, we propose a novel D-type flip-flop structure. The presented structure boasts a remarkably low power consumption, showcasing a reduction exceeding 61% compared to other existing structures. Furthermore, the proposed circuit incorporates a reduced number of transistors, resulting in a reduced footprint. Importantly, this circuit exhibits negligible static power consumption in generating intermediate values, rendering it robust against process variations. Overall, the proposed circuits demonstrate a 29.7% increase in delay compared to the compared structures. However, they showcase a 96.1% reduction in power-delay product (PDP) compared to the other structures. The number of transistors is also 8.3% less than other structures. Additionally, their figure of merits (FOM) are 19.7% better than the best-compared circuit, underscoring its advantages in power efficiency, chip area, and performance.
