Volume 6, Issue 4 (December 2010)                   IJEEE 2010, 6(4): 199-204 | Back to browse issues page

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Mirhosseini S H, Ayatollahi A. A Low-Voltage, Low-Power, Two-Stage Amplifier for Switched-Capacitor Applications in 90 nm CMOS Process. IJEEE 2010; 6 (4) :199-204
URL: http://ijeee.iust.ac.ir/article-1-275-en.html
Abstract:   (13472 Views)
Abstract- A novel low-voltage two-stage operational amplifier employing resistive biasing is presented. This amplifier implements neutralization and correction common mode stability in second stage while employs capacitive dc level shifter and coupling between two stages. The structure reduces the power consumption and increases output voltage swing. The compensation is performed by simple miller method. For each stage an independent common-mode feedback circuits has been used. Simulation results show that power consumption is 2.1 mW at 1V supply. The dc gain of the amplifier is about 70 dB while its output swing is as high as around 1.2V.
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Type of Study: Research Paper | Subject: Analog Circuits
Received: 2010/04/22 | Revised: 2011/12/24 | Accepted: 2013/12/30

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© 2022 by the authors. Licensee IUST, Tehran, Iran. This is an open access journal distributed under the terms and conditions of the Creative Commons Attribution-NonCommercial 4.0 International (CC BY-NC 4.0) license.