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:: Design of phoeniX: A RISC-V Platform for Approximate Computing ::
 | Post date: 2023/10/17 | 

The phoeniX project was initiated in the summer of 2023 at the Electronics Research Center of Iran University of Science and Technology. Led by two academic research laboratories, Super Computing and Networking (SCaN) Research Lab and the Circuit Design Research Lab, the primary objective of this project is to design a foundational processor for architectural research and development especially for the emerging field and concept of approximate computing.
While numerous open-source processors have been developed by universities and individuals on GitHub, many of them possess complex design and simulation processes that holds computer architecture researchers from finding a suitable platform for their research endeavors. One of our most important goals in this project was removing these complexities for developers and enthusiasts of this field, along with maintaining and increasing the quality of experiences.
The phoeniX 32-bit processor, has a modular and extensive design, which is highly beneficial for developers, as it facilitates testing and research on computer architecture techniques. A key aspect of this processor is the removal of the traditional and classic “Control Unit” found in most RISC processors. Instead, each module in the processor can generate its own control signals based on the fields of the instruction it receives after the decode stage. All submodules are equipped with self-controllability feature and this principle is called “Self-Control Logic”. This microarchitecture, helps us with the modularity and extensiveness of the top module which is the phoeniX core.
 
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کلیه حقوق مادی و معنوی این سایت متعلق به پژوهشکده الکترونیک می باشد . نقل هرگونه مطلب با ذکر منبع بلامانع می باشد .