Education:

• Ph.D. in computer architecture, CE department, Sharif University of Technology, Iran, 2011.

• M.Sc. in computer architecture, CE department, Sharif University of Technology, Iran, 2005.

• B.Sc. in computer hardware, Azad University of Arak, Iran.

• System-on-Chip (SoC) and Network-on-Chip (NoC) Design
• Design for Testability
• Dependability Evaluation and Modeling
  
• Interconnection Networks: Design and Evaluation
• Computer Architecture
• Analytical Performance Modeling

 Publications:

Journal papers:

1) A. Patooghy, H. Sarbazi-Azad, “Comparative Analytical Performance Evaluation of Adaptivity in Wormhole-Switched Hypercubes”, in the Elsevier Journal of Simulation Modeling Practice and Theory.

2) A. Patooghy, H. Sarbazi-Azad, “An Accurate Mathematical Performance Model of Partially Adaptive Routing in Binary n-Cube Multiprocessors”, in the Elsevier Journal of Mathematical and Computer Modeling.

3) M. Fazeli, S. Gh. Miremadi, A. Ejlali, A. Patooghy, “A Low Energy SEU/SET-Tolerant Latch for Deep Sub Micron Technologies”, in the Journal of IET Computers & Digital Techniques.

4) A. Patooghy, S. G. Miremadi, “Complement Routing: A Methodology to Design Low Overhead and Reliable Routing Algorithm for Network on Chips” in the Elsevier Journal of Microprocessors and Microsystems.

5) A. Patooghy, S. G. Miremadi, M. Fazeli “A Reliable Switch Architecture for Network on Chips” in the Elsevier Journal of Integration: The VLSI.

6) A. Patooghy, S. G. Miremadi, H. Tabkhi, “A Reliable & Power Efficient Flow-Control Method to Eliminate Crosstalk Faults in Network-on-Chips”, in the Elsevier Journal of Microprocessors and Microsystems.

7) A. Patooghy, S. G. Miremadi, M. Shafaei, “Power-Delay Modeling of on-Chip Interconnect in Presence of Crosstalk Faults”, Submitted to the IET Journal of Computers & Digital Techniques.

8) R. Sabbaghi, A. Patooghy, “Analytical Performance Modeling of De Bruijn Inspired Mesh-Based Network-on-Chips”, Submitted to the Elsevier Journal of Performance Modeling.

Conference papers:

2005:

9) A. Javad-Talab, A. Patooghy, S. Gh. Miremadi, M. Omid-Yeganeh, “Reliability Modeling of A Reconfigurable TMR System”, 10^th Computer Society of Iran Computer Conference (CSICC 2005, in Persian).

2006:

10) A. Patooghy, H. Sarbazi-Azad, “Analytical Performance Modeling of Partially Adaptive Routing in Wormhole Hypercubes”, in Proceedings of 20^th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2006).

11) A. Patooghy, H. Sarbazi-Azad, “Performance Comparison of Partially Adaptive Routing Algorithms”, in Proceedings of 20^th IEEE International Conference on Advanced Information Networking and Applications (AINA 2006).

12) A. Patooghy, H. Sarbazi-Azad, “Analytical Performance Comparison of Deterministic, Partially- and Fully- Adaptive Routing Algorithms in Binary n-Cubes”, in Proceedings of 12^th International Conference on Parallel and Distributed Systems (ICPADS 2006).

13) A. Patooghy , S. Gh. Miremadi, A. Javadtalab, M. Fazeli, N. Farazmand, “A Solution to Single Point of Failure Using Voter Replication and Disagreement Detection”, in Proceedings of 2^nd IEEE International Symposium on Dependable, Autonomic and Secure Computing (DASC 2006).

14) S.S. Miremadi, M. Fazeli, A. Patooghy, S.G. Miremadi "Performance Evaluation of a Routing Protocol for Wireless Sensor Networks", 3^rd IEEE and IFIP International Conference on wireless and Optical Communications Networks (WOCN 2006).

15) H. Sarbazi-Azad, H. Mahini, A. Patooghy, “Analytic Modeling of Channel Traffic in n-Cube Networks”, International Computer Science Symposium in Russia (CSR 2006).

2007:

16) S. Meraji, H. Sarbazi-Azad, A. Patooghy, “Performance Modelling of Necklace Hypercubes”, in Proceedings of 21^st IEEE International Parallel & Distributed Processing Symposium (IPDPS 2007).

17) M. Fazeli, A. Patooghy, S. Gh. Miremadi, A. Ejlali, “Feedback Redundancy: A Power-Aware SEU-Tolerant Latch Design in DSM Technologies”, in Proceedings of the 37^th International Conference on Dependable Systems and Networks (DSN 2007).

18) A. Patooghy, M. Fazeli, S. G. Miremadi, “A Low-Power and SEU-Tolerant Switch Architecture for Network on Chips” in Proceedings of 13^th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2007).

19) A. Patooghy, M. Fazeli, S. G. Miremadi, “Reducing Power Consumption in NoC Design with no Effect on Performance and Reliability”, in Proceedings of 14^th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2007).

2008:

20) M. Fazeli, A. Patooghy, S. Gh. Miremadi, “The Interplay of Reliability and Power Consumption in Design of SEU-Tolerant Latches for DSM Technology”, in Proceedings of the 6^th IEEE East-West Design & Test Symposium (EWDTS 2008).

21) A. Patooghy, S. G. Miremadi, “LTR: A Low-Overhead and Reliable Routing Algorithm for Network on Chips”, in Proceedings of International SoC Design Conference (ISOCC 2008).

2009:

22) A. Patooghy, S. G. Miremadi, “XYX: A Power & Performance Efficient Fault-Tolerant Routing Algorithm for Network on Chip”, in Proceedings of 17^th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP 2009).

23) A. Patooghy, S. G. Miremadi, “Reliability & Performance Modeling to Speed-Up the NoC Design” in Proceedings of 15^th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2009).

2010:

24) A. Patooghy, S. G. Miremadi, “RMAP: A Reliability-Aware Application Mapping for Network-on-Chips” in Proceedings of the Fifteenth International Conference on Dependable Computing (Depend 2010).

25) A. Patooghy, H. Tabkhi, S. G. Miremadi, “An Efficient Method to Reliable Data Transmission in Network-on-Chips”, in Proceedings of 13th Euromicro Conference on Digital System Design (DSD 2010), Lille, France, September 2010.

26) A. Patooghy, S. G. Miremadi, M. Shafaei, “FiRot: An Efficient Crosstalk Mitigation Method for Network-on-Chips” in Proceedings of 16^th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2010).

27) A. Patooghy, S. G. Miremadi, M. Shafaei, “Crosstalk Modeling to Predict Channel Delay in Network-on-Chips” in Proceedings of 28^th IEEE International Conference on Computer Design (ICCD 2010).

28) Z. Shirmohammadi, M. Jalal, A. Patooghy, S. G. Miremadi, “A Reconfigurable Switch Architecture to Enhance Reliability of Network-on-Chips”, Proceedings of the International Conference on Real-Time & Embedded Systems (RTES 2010).

29) M. Jalal, Z. Shirmohammadi, A. Patooghy, S. G. Miremadi, “Evaluation of Application Mapping for Network-on-Chips”, Proceedings of the International Conference on Real-Time & Embedded Systems (RTES 2010).

2011:

30) M. Shafaei, A. Patooghy, S. G. Miremadi, “An Efficient Forbidden Pattern Free Coding to Remove Crosstalk Faults form NoC Channels”, to be appear in Proceedings of 14th Euromicro Conference on Digital System Design (DSD 2011).

31) M. Shafaei, A. Patooghy, S. G. Miremadi, “Numeral-Based Crosstalk Avoidance Coding to Reliable NoC Design”, to be appear in Proceedings of 19th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2011).