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IJEEE

AWT IMAGE

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:: Dr.mirzakuchaki ::

 AWT IMAGE

 Full Name: Sattar Mirzakuchaki

 Position:   Associate Professor

 Phone:    98-021-77240487

 Fax:        98-021-77240486

 AWT IMAGE

 

Education  Work Experience  *  Teaching Experience

Journal Papers *  Conference Papers *   Projects  *  Honors and Awards 

 Books Published *  Professional Skills *  Postgraduate Projects 

 

     

Education

  Aug. 1991 - Aug. 1996 Ph.D. in Electrical Engineering at University of Missouri-Columbia, USA. Major Area: Solid State Electronics. GPA: 3.9/4.0

  Aug. 1989 - May 1991 MS degree in Electrical Engineering at University of Missouri-Columbia, USA. Major Area: Solid State Electronics. Project: VLSI design and simulation of a 4-bit CLA adder. GPA: 3.7/4.0

  Aug. 1985 - May 1989 BS degree in Electrical Engineering at University of Mississippi, USA. GPA: 3.8/4.0

 

Work Experience

   • The Head of ERC, July 2009 - 2011, The Head of Electronic Research Center. 

  • Visiting Professor, Mar. 2008-Sep. 2008, Department of Electrical and Computer Engineering, University of Western Ontario, Canada

  Associate Professor , Feb. 2008 – present, Department of Electrical Engineering, Iran University of Science and Technology, Have been an invited lecturer in other Iranian universities such as K. N. Toosi Technical University, Kish university, University of Gilan, University of Arak

  Assistant Professor , Dec. 1996 – Feb. 2008, Department of Electrical Engineering, Iran University of Science and Technology

  Teaching Assistant ; Aug. 1992 - Aug. 1996 Department of ECE, University of Missouri-Columbia. Lab instructor and coordinator for Junior/Senior level course ECE 255 (Experimental Electrical Engineering)

  Computer User Consultant ; Aug. 1991 - Aug. 1996 Campus Computing, University of Missouri-Columbia. Installation of software and hardware, help with usage of specific software and operating systems, management of LAN

 

Teaching Experience

  Undergraduate:

            •  Solid State Physics

            •  Electronics (parts 1 & 2)

            •  Logic Circuit design, Industrial Electronics

            •  Assembly Language, Microcontrollers

            •  Pulse Generation Techniques

  Postgraduate:

            •  Design of VLSI Circuits

            •  Linear IC Design

            •  High Speed Semiconductor Devices

            •  VHDL

            •  Advanced Digital IC design

            •  Advanced VLSI design

 

Journal Papers

 (1) "Selective Area Deposition of Diamond Thin Films on Patterns of Porous Silicon by Hot Filament Chemical Vapor Deposition", Applied Physics Letters, 67, 3557, 1995

 (2) “History of Silicon”, Special Edition on Electronics of Pajouheshyar, No 16, p. 39, 2000

 (3) “Rectifying Behaviour of Heterostructures Formed on Phosphorous-doped Polycrystalline Thin Films”, IUST International Journal of Engineering Science, Vol. 15, No. 3, PP. 95-100, 2004

 (4) " Room-Tempeature Gas-Sensing Ability of PtSi/Porous Si Schottky Diodes", IEEE Sensors Journal, Vol. 6, No. 1, Feb 2006, pp. 146-150

 (5) “Modeling and Simulation of Substrate Noise in Mixed-Signal Circuits Applied to a Special VCO”, IJEEE, Vol. 2, No. 2, 2006, pp. 8-15

 (6) “ Simulation of Substrate Noise for a Special Mixed-Signal Circuit”, WSEAS Trans. On Circuits and Systems, Issue 10, Vol. 5, Oct. 2006, pp. 1528-1535

 (7) “ Simulation of Substrate Coupling in Mixed-Signal IC’s Using an Efficient and Real-Time Macromodel”, IEICE Electronics Express, Vol. 3, No. 23, Dec. 2006, pp. 509-516

 (8) “Room-temperature infrared radiation detection using n-type PtSi/porous Si”, Sensor Letters, Vol. 5, No. 2, Jun. 2007, pp. 387-391

 (9) “Public Key Cryptography Based on Semimodules over Quotient Semirings”, International Mathematical Forum, Vol. 2, No. 52, 2007, pp. 2561-2570

 (10) "Test Access to Deeply Embedded Analog Terminals within an A/MS SoC", Journal of Zhejiang Univ. Science A, Vol 8, No 10, 2007

 (11) "Behavioral Modeling and Simulation Techniques for Substrate Coupling Analysis in Phase Locked Loop", Journal of Applied Sciences, 2008

 (12) "On DPA-Resistive Implementation of FSR-based Stream Ciphers Using SABL Logic Styles", Int. J. of Computers, Communications& Control, Vol. 2, No. 4, 2008, pp. 1841-9844

 (13) "Analysis of Output Power Saturation in SOAs", Technical & Scientific Journal of the Islamic Azad University, No. 24, 2008

 (14) "Public Key Cryptography Using Semigroup Actions and Semirings", J. Discrete Mathematical Sciences & Cryptography, Vol. 11, No. 4, 2008, pp. 437-445

 (15) "Behavioral Modeling and Simulation of Semiconductor Devices and Circuits Using VHDL-AMS", IJEEE, Vol. 4, No. 4, 2008, pp. 165-175

 (16) “Classification of Cardiac Arrhythmias by Learning Vector QuantizaterNetwork and based on Extracted Features from Wavelet Transform”, Iranian J. of Biomedical Engineering, Vol. 1, No. 3, pp. 167-176

 (17)“LUT-Based QCA Realization of a 4*4 S-Box”, Canadian J. Electrical & Electronics Engineering, Vol. 1, No. 3, Apr. 2010, pp. 27-31

 (18)“Single Electron Fault Modeling in QCA Inverter Gate”, Canadian J. Electrical & Electronics Engineering, Vol. 1, No. 1, Feb. 2010, pp. 20-23

 

Conference Papers

 (1) “Activation Energy Measurement of Phosphorous-doped Polycrystalline Diamond Thin Film Grown by HFCVD”, MRS Spring Meeting Proceedings, , Apr 1996, pp 423, 655, USA

 (2) “Growth and Characterization of Polycrystalline Diamond Thin Films on Porous Silicon Substrates by Thermally Activated Chemical Vapor Deposition”, MRS Spring Meeting Proceedings, Apr 1996, pp 423, 415, USA

 (3) “Low Volume Resistivity Chemical Vapor Deposited Boron-doped Polycrystalline Thin Diamond Film Growth of Sapphire”, MRS Spring Meeting Proceedings, Apr 1996, pp 423, 589, USA

 (4) “Measurement of the Negative Temperature Coefficient of Resistance in Phosphorous-doped Diamond Thin Films”, Proceedings of the 6th ICEE, , PP III-1, 1998, Iran

 (5) “Design of a Neural Network Processor”, Proceedings of the 9th ICEE, PP 1- 28, 2001, Iran

 (6) “Hardware Implementation of a Transposed FIR Digital Filter”, Proceedings of the 10th ICEE, 2002, Iran

 (7) “Digital Hardware Design of MLP Neural Networks for Industrial Applications”, Prodeedings of 1st ICME, pp 290-296, 2003, Iran

 (8) “Separation of Activation Signals in FMRI Data by Independent Component Analysis (ICA)”, Proceedings of 11th ICBME, pp 393-399, 2004, Iran

 (9) " An Investigation of Gain and Gain-Frequency Spectrum in a Semiconductor Optical Amplifier Using Numerical Representation", Proc. of ICSE2004, pp 585-588, Dec 2004, Malaysia

 (10) "Classification of Cardiac Arrythmias By Learning Vector Quantizer Network And Using Extracted Features With WAVELET Transform ", Proceedings of 13th ICEE, pp201-206, 2005,Iran

 (11) “An investigation of gain, carrier density, and photon rate of signal and ASE in a semiconductor optical amplifier using numerical representation”, Proc. ICOCN2005, pp 41-44, Dec. 2005, Thailand

 (12) "Design and Testing of a Thermal Sensory System for Artificial Limbs", The 7th National Congress of Orthotics & Prosthetics, May 2005, Iran

 (13) "A Low Power, High SFDR, ROM-less Drirect Digital Frequency Synthesizer", Proceedings of the 2005 IEEE Confernce on Electron Devices & Solid-State Circuits, Dec. 2005, Hong Kong

 (14) “ Behavioral Modeling of Semiconductor Devices Taking Into Account the Thermoelectrical Effect Using VHDL-AMS”, Proc. of 15th IASTED international conf. on applied simulation & modeling, pp 548-553, Jun 2006, Greece

 (15) “ An Energy Recovery Static RAM with MEQUL Transistor and Driving Line Technique in Voltage Mode”, Proc. of 14th ICEE, pp 1-5, 2006, Iran

 (16) “ The Scalable and Reconfigurable DFT for Embeded A/MS Cores”, Proc. of 2006 International SOC Design conf, Oct. 2006, Korea

 (17) “ Modeling and Simulation of Substrate Noise in Mixed-Signal Circuits Applied to a Special VCO”, Proc. 6th WSEAS International conf. on Simulation, Modeling, and Optimization, pp 252-258, Sept. 2006, Portugal

 (18) “High CMRR, Low Power and Wideband Current-Mode Instrumentation Amplifier”, 24th Norchip Conference, Nov. 2006, Sweden

 (19) “Uniform BIST Strategy for CPU data Path in RT level of Abstraction”, proceedings of CSICC2007, Iran

 (20) “An Efficient and Real time macromodel for Accurate and Fast Simulation of Substrate Coupling in Mixed Signal IC’s”, INMIC06, Dec 2006, Pakistan

 (21) “An Efficient Analytical Technique for Fast and Accurate Modeling of Substrate Coupling in Mixed-Signal IC’s”, INMIC06, Dec 2006, Pakistan

 (22) “Designing a Control System for a 5R Telerobot based on DTMF”, Proc. of 15th ICEE, Mar 2007, Iran

 (23) “A New Signal Processing System for IRFPA Nonuniformity Detection and Correction Based on FPGA and DSP”, Proc. of 15th ICEE, Mar 2007, Iran

 (24) “Behavioral Modeling and Simulation of Semiconductor Devices and Circuits Using VHDL-AMS”, ICIEA2007, China

 (25) “Modeling the Effects of Deep Level Traps and Carrier Transport on the L-I Characteristic, Transient Response and Wavelength Chirp of SCH-QW Lasers”, WCON2007, pp 1-4, July 2007, Singapore

 (26) “Accessibility to Embedded A/MS Cores: An Osicllation-Based S-R DFT”, Proc. of 12th European Test Symposium, May 2007, Germany

 (27) “ Design and Implementation of A 50MHZ DXT Coprocessor”, Proc. Of 10th Euromicro conference ( DSD 2007), Aug 2007, Germany

 (28) "A Real Time Infrared Imaging System Based on DSP and FPGA", Proc. Of PSIVT 2007 

 (29) "A Solution to Remote Detecting of Illegal Electricity Usage Based on Smart Metering", Proc. Of 2nd IEEE International Workshop on Soft Computing Applications, Aug 2007, Hungary, Romania

 (30) "Design and Implementaion of a 157 MHz DA-Based DXT CoProcessor", Proc of 4th IEEE GCC, Nov. 2007, Bahrain

 (31) "Field Programmable Nanowire Interconnect", Proc. Of 13th National Conference of Iranian Computer Society, Feb. 2008, Kish Island, Iran

 (32) "Design and Analysis of a High Speed, Low Power NAND Gate in DyCML", Proc. Of 13th National Conference of Iranian Computer Society, Feb. 2008, Kish Island, Iran

 (33) "A Gm-C Anti-Aliasing Filter for Digital Radio Receivers", 2nd International Conference on Electrical Engineering, March 2008, Lahore, Pakistan

 (34) "Design and Simulation of a DPA Resistive Circuit for Trivium Stream Cipher Based on SABL Logic Styles", Proc. Of MIXDES 2008, Poland

 (35) "Design and Implementation of an Image Coprocessor", Proc. Of 3rd Int. conference on Image and Signal Processing, July 2008, France

 (36) "QCA Implementation of a MUX-Based FPGA CLB", Proceedings of International Conference On Nanoscience and Nanotechnology ICONN, , Feb. 2008, pp. 141-144, Australia

 (37) "Analysis of CMOL FPGA", Iranian Students' Nanotechnology Conference, Razi University, Kermanshah, Sep. 2008

 (38) "Analysis of Frequency Response in Nonsymmetric Multi-QW Lasers", Iranian Students' Electrical Engineering Conference, 2008

 (39) "On the Effect of Potential Barrier on Uneven Charge Distribution in Nonsymmetric Multi-QW Lasers", Iranian Students' Electrical Engineering Conference, 2008

 (40) "Reliability Issues of Nanowires in FPNI Technology", Proc. 16th Iranian Conference on Electrical Engineering, May 2008

 (41) "Design and Implementation of a 118 MHz 2D DCT Processor", Proc. IEEE International Symposium on Industrial Electronics, Cambridge, U.K, Jun. 30- Jul. 2, 2008

 (42) "Design and Simulation of a DPA Resistive Circuit for TRIVIUM Stream Cipher Based on WDDL Logic Styles", Third international conference on modeling, simulation and applied optimization, Jan. 20-22, 2009, U.A.E

 (43) " Differential power analysis attack on A5/1 stream cipher ", Third international conference on modeling, simulation and applied optimization, Jan. 20-22, 2009, U.A.E

 (44) “Wide-Range Control of Output Voltage in Z-source Inverter by Neural Network”, Int. Conf. on Electrical Machines & Systems (ICEMS 2008), Oct. 17-20, 2008, China

 (45) “SEU Effects on QCA Circuits”, IEEE int. Conf. on Testing & Diagnosis (ICTD’08)”, Oct. 25-26, 2008, China

 (46) “Reduction of Power Dissipation in SB_FPNI”, Proc. 17th Iranian Conference on Electrical Engineering, May 2009

 (47) “Alamout: A New Synchronous Stream Cipher with Authentication”, Wireless ViTAE’09, May 17-20, 2009, Denmark

 (48) “Low Cost Implementation of Pomaranch S-Box”, Wireless ViTAE’09, May 17-20, 2009, Denmark

 (49) “Three phase power line balancing based on smart energy meters”, Eurocon 2009, May 18-23, 2009

 (50) "A Study on CNT Mosfet's Performance Dependence on Channel Length and Doping Density", 12th Iranian Student Conf. on EE, Tabriz, Iran, Agu.13-15, 2009.

 (51) "Dependence of CNT Mosfet's Performance on Variations in Channel Diameter and Gate Dielectric", 2nd Iranian Conf. on Electrical and Electronics Engineering, Gonabad, Iran, Agu. 19-20, 2009.

 (52) "The Effect of Temperature on CNT Mosfet's performance Having Doped CNT as Source and Drain", 2nd Iranian Conf. on Electrical and Electronics Engineering, Gonabad, Iran, Agu. 19-20, 2009.

 (53) "Design of New CMOS Current Mode Min and Max Circuits for FLC Chip Applications", European Conf. on Circuit Theory and Design, Turkey, Agust 23-27, 2009.

 (54) "QCA Implementation of A5/1 Stream Cipher" , Second Int. Conf. on Advances in Circuits, Electronics and Micro-electronics, Malta, Oct. 2009.

 (55) "Single Electron Fault in QCA Binary Wire" , Second Int. Conf. on Advances in Circuits, Electronics and Micro-electronics, Malta, Oct. 2009.

 (56) "QCA Implementation of Serpent Block Cipher" , Second Int. Conf. on Advances in Circuits, Electronics and Micro-electronics, Malta, Oct. 2009.

 (57) “A Second Order Gm-C Continuous Time Filter in Mobile Radio Receiver Architecture”, 2010 2nd Int. Conf. Education Technology and Computer (ICETC), Shanghai, China, 22-24 Jun. 2010.

 (58) “Design of a 100MHz – 1.66GHz, 0.13um CMOS Phase Locked Loop”, 2010 Int. Conf. Electronic Devices, Systems and Applications (ICEDSA), Kuala Lumpur, Malaysia, 11-14 Apr. 2010

 (59) “Study of Carbon Nanotube Field Effect Transistor Performance based on Changes in Gate Parameters”, 3rd Int. Nanoelectronics conference, 3-8 Jan. 2010

 (60) “Using Symlet Decomposition Method, Fuzzy Integral and Fisherface Algorithm for Face Recognition”, 2010 Second Int. Conf. Computer Engineering & Applications, Indonesia, 19-21 March 2010

 (61) “Impact of Lenth and Diameter of Channel on Carbon Nanotube Field Effect Transistors”, 3rd Conf. on Nanostructures (NS2010), Kish Island, Iran, 10-12 March 2010

 

 

Projects

  • Cooperation in establishing and equipping the Electronic Research Center at IUST

  • Comprehensive study on the development of microelectronics for Ministry of Industries

  • Design of FPGA

  • Design and Fabrication of IR detector's readout Circuit

 

Honors and Awards

  Chartered Engineer (IET’s CEng)

  Member of ETA KAPPA NU (Electrical Engineering Honor Society)

  Member of Golden Key Honor Society

  1992-93 Donald K. Anderson Graduate Student Teaching Award, University of Missouri

  Superior Graduate Achievement Award, University of Missouri

  Recipient of the University of Mississippi ISO Scholarship for academic years 1987 -1989

  Member of IET(formerly IEE)

  Member of MRS

 

Books Published

 (1) “PIC Microcontroller: Structure, Programming, and Applications” (in Persian), Iran University of Science and Technology publications, 2006

 (2) "Fundamentals of Power Electronics", (translated into Persian), Islamic Azad University, 2008

 (3) Model Engineering in Mixed-signal Circuit Design”, (translated into Persian), Islamic Azad University, 2009

Professional Skills

 Integrated circuit design and simulation : VLSI circuit design and simulation (MAGIC, CAESAR, LEDIT), SPICE simulation, VHDL simulation and FPGA implementation.

 Semiconductors processing and characterization : oxidation, diffusion, photolithography, sputtering, vacuum thermal evaporation, wet chemical etching, silicon etching, HRP mask making, bonding, chemical vapor deposition, scanning electron microscopy, Raman spectroscopy, X-ray diffraction, photoresponce characterization, impedance measurements, etc.

  Computer skills : FORTRAN, BASIC, C, VHDL ,MS-DOS, Windows,

  UNIX, Macintosh, NeXT, SGI, CMS

 

Postgraduate Projects 

  •  Implementation of Adaptive filters on FPGA

  •  Implementation of Pace maker on DSP

  •  Design of a Pipelined CMOS A/D

  •  Design of Test Utilities for ADC chips

  •  Medical Image Compression Using Wavelet

  •  Design of a 16-bit sigma-delta ADC

  •  Testing the general Features of a PLL

  •  Design and Simulation of a new stream Cipher based on Rabbit algorithm

  •  Design and simulation of an Steganographic system

  •  Using LSB method in Digital Image Steganography.

  •  Optimizing the architecture of TMS320C4X DSP

  •  Design of a Cryptography Coprocessor on DSP

  •  Reconfigurable Hardware

  •  Design and Simulation of an image compressor on DSP

  •  Hardware Implementation of AES algorithm in WIMAX networks

  •  Design and Implementation of an 8-bit Microcontroller

  •  Modeling the Substrate Coupling in mixed-mode Circuits

  •  Design of a testing algorithm in mixed-mode Circuits

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